Low power circuit design is one of the most active IC design arenas in modern electronics, at least in part because of the constant pressure to increase battery life in mobile devices. As oversampling analog to digital converters (ΔΣ ADCs) have wide applications in modern electronics, reducing their power consumptions while maintaining performance has significant implications in new product development.
Unlike Nyquist rate ADCs, where analog signal is digitized by a set of quantized reference levels of which the number of quantization levels directly determines the resolution of an ADC, oversampling ADCs use only a small number of quantization levels to achieve high conversion resolution. For example, a ΔΣ ADC with a 1-bit quantizer can achieve conversion resolutions of more than 12-bit. The large amount of quantization noise in a ΔΣ ADC is pushed outside the signal band by a loop filter and only a small amount of in-band quantization noise remains. The subsequent digital filter can remove the out-of-band quantization noise to achieve high resolution. In other words, the analog difficulties of designing high precision reference levels are traded with digital signal processing, which is much easier to implement. The architecture of a typical low pass loop filter ΔΣ ADC is shown in FIG. 1.